A conventional lumped constant type electromagnetic delay line typically comprises an inductive device consisting of a plurality of turns of electroconductive wire, and chip capacitors connected to a plurality of taps provided in the inductive device so as to form a ladder circuit consisting of a plurality of sections, typically ten sections. One of the important applications of the electromagnetic delay line of this type is the adjustment of a skew in the clock signal of computer systems, and an electromagnetic delay line for such an application is desired to be capable of delaying a pulse signal having a period in the order of the delay time of the electromagnetic delay line, in a stable manner. For instance, an electromagnetic delay line with a delay time of 20 ns is desired to be capable of delaying a pulse signal of 50 MHz in a stable manner.
However, in such an electromagnetic delay line, as the frequency of the pulse signal to be delayed approaches the cut-off frequency, the group delay property tends to change, and the delay time is affected accordingly. Therefore, an electromagnetic delay line consisting of ten sections may not be adequate for such an application, and is desired to be consisting of, for instance, 15 sections. Therefore, at least 14 chip capacitors are needed for such an electromagnetic delay line, and they have to be spaced apart to avoid mutual contacts. This obviously creates a serious difficulty in keeping the size of the electromagnetic delay line sufficiently small.
The inventor of this patent application previously proposed in U.S. Pat. No. 4,649,356 an electromagnetic delay line of this type featuring a small size and low manufacturing cost. According to this electromagnetic delay line, as illustrated in FIG. 4, a pair of first intermediate electrodes 3 and 5 serving as input and output electrodes and second intermediate electrodes 7 placed between the first intermediate electrodes 3 and 5 are all mounted on a major surface of a rectangular mounting plate 1 in mutually spaced relationship, and an inductive device 11 is formed by a plurality of turns of electroconductive wire wound around a bobbin 9 consisting of a rectangular plate. Two ends 11a and 11b and intermediate taps 11c of the inductive device 11 are soldered to the first intermediate electrodes 3 and 5 and the second intermediate electrodes 7, respectively, which are located along a long side of the rectangular mounting plate 1, and individually electrodes of a composite capacitor 13, consisting of an array of capacitors, are soldered to the intermediate electrodes 3, 5 and 7 on the major surface of the mounting plate 1.
The intermediate electrodes 3, 5 and 7 extend from the mentioned long side to the vicinity of the other long side of the mounting plate 1 on which a connecting electrode 15 is centrally formed. The composite capacitor 13 is connected to this connecting electrode 15 via a connecting piece 17, and input, output and common terminals 19, 21 and 23 are connected to the input, output and connecting electrodes 3, 5 and 15, respectively.
As illustrated in FIG. 5A, the composite capacitor 13 is provided with an elongated rectangular dielectric plate 13a, a common electrode 13b placed on one side (reverse side as seen in FIG. 5A) thereof substantially over the entire length thereof, and a plurality of individual electrodes 13c arranged on the other side of the dielectric plate 13a so as to correspond to the first intermediate electrodes 3 and 5 and the second electrodes 7. By soldering these individual electrodes 13c to the corresponding first and second intermediate electrodes 3, 5 and 7, a lumped constant type electromagnetic delay line is formed.
FIG. 5B illustrates the process for fabricating this composite capacitor. A ceramic dielectric plate of 25 mm square having a relative dielectric constant of 100 to 200 is polished to a thickness of 0.2 mm, and a layer of silver paste is applied over the entire surface of one side of this plate while a striped pattern of silver paste is deposited on the other side of this plate. It is then baked at approximately 800.degree. C. The assembly thus prepared is cut into narrow strips perpendicularly to the direction of the stripes as indicated by the dotted lines in FIG. 5B.
The use of such a composite capacitor allows the pitch of the individual electrodes 13c to be in the order of 0.7 mm, and allows an electromagnetic delay line consisting of 15 sections to be formed by using a small mounting plate measuring 4.4 mm in width and 11 mm in length. This was a significant improvement over the previously known electromagnetic delay lines. Furthermore, the electromagnetic delay line illustrated in FIG. 4 may be encapsulated in a molded member, and, with its thickness no more than 2.5 mm, can be conveniently used with integrated circuits.
However, due to the ever growing demands for more compact design of computers and other electronic equipment, not only active components such as integrated circuits are desired to be reduced in size but also passive components such as resistors, capacitors and inductors are also desired to be further reduced in size.
Meanwhile, use of chip components adapted for the highly automated surface mounting technology has grown rapidly in recent years, and electromagnetic delay lines are also desired to be made available in the form of chip components. Additionally, it is desirable in view of design considerations that electromagnetic delays lines of a same package are capable of providing a wide range of delay time.
For instance, if an electromagnetic delay line having a structure such as that shown in FIG. 4 is made into a chip component by using a mounting plate measuring 4.4 mm in width and 11 mm in length, and is encapsulating in a molded package by transfer molding for instance by epoxy resin, its overall size will be 5.4 mm in width and 13 mm in length, which however is excessive in size for it to be conveniently used as a chip component.
Furthermore, this structure is useful only when the delay time is within a certain limit, for instance 15 ns when the characteristic impedance is 50 ohms. Therefore, achieving a delay time of 30 ns is highly difficult with this structure. To obtain such a large delay time, it is necessary to increase the capacitance of the capacitors, but in order to achieve such a large capacitance with the composite capacitor illustrated in FIG. 5, the ceramic dielectric plate typically having a relative dielectric constant of 200 has to be polished to a thickness in the order of 0.07 mm, and it is not practical to prevent the dielectric plate from being damaged during the fabricating process.
By using a dielectric plate made of a material having a large relative dielectric constant, the thickness of the dielectric plate can be increased to an acceptable level, but the relative dielectric constants of such materials are normally strongly affected by temperature, making them quite unsuitable for use as the capacitors for electromagnetic delay lines.
When a large delay time is not needed, it is possible to use a dielectric plate having the conventional thickness of 0.2 mm for the composite capacitor of the electromagnetic delay line of the type illustrated in FIG. 4. However, if the size of the electromagnetic delay line is required to be reduced, because the area of each of the individual electrodes 13c cannot be reduced, the gaps between the individual electrodes 13c must be reduced, and this causes an increase in the parasitic capacitance between the individual electrodes 13c which adversely affects the performance of the electromagnetic delay line.
FIG. 6 shows an equivalent circuit of the electromagnetic delay line for explaining this point. A plurality of inductances L are connected in series, and a plurality of capacitances C are connected thereto as a ladder circuit. Neighboring inductances L are coupled with each other by a mutual inductance M.
In such a circuit, a parallel capacitance Ca connected in parallel with each inductance L tends to degrade the delay property of the electromagnetic delay line, but a bridging capacitance Cb connected in parallel with each adjacent pair of inductances L improves the delay property of the electromagnetic delay line.
When the composite capacitor illustrated in FIG. 5 is used in the electromagnetic delay line of the type illustrated in FIG. 4, the parasitic capacitance between neighboring individual electrodes 13c correspond to the parallel capacitance Ca, but there is no source for producing, in any substantial amount, the bridging capacitance Cb which acts favorably toward the delay property of the electromagnetic delay line. Therefore, when the electromagnetic delay line of the type illustrated in FIG. 4 is fabricated as consisting of 15 sections, and its overall size is reduced, a satisfactory performance as an electromagnetic delay line cannot be attained.